This description relates to a matching circuit for two-channel Analog to Digital Converters (ADCs) by which operational characteristics of two ADCs for respectively converting two-channel analog signals to digital signals can be matched.
More particularly, this description relates to a matching circuit for two-channel ADCs by which operation characteristics of two ADCs for converting an analog signal of I (In-phase) channel and an analog signal of Q (Quadrature-phase) channel to respective digital signals in satellite Digital Multimedia Broadcasting (DMB) signals received by a satellite DMB receiver can be mutually and accurately matched.
Recently, concomitant with development of digital broadcasting techniques and implementation of satellite digital multimedia broadcasting, demand on satellite DMB receivers capable of receiving and viewing DMB signals has continuously increased.
The satellite DMB signals received by the satellite DMB receivers include analog signals of two channels. In other words, the satellite DMB receivers receive an analog signal of I (In-phase) channel and an analog signal of Q (Quadrature-channel). The satellite DMB receiver converts the two channels of analog signals to respective digital signals via ADCs and displays them on a screen. The characteristics of converting the analog signals of two channels to respective digital signals by the satellite DMB receivers are directly reflected on those of the picture quality on the screen.
Chips inherently disposed in the satellite DMB receivers are mounted with two ADCs for converting the analog signals of two channels to respective digital signals. In addition, the analog signals should be set up with a predetermined level of direct current (DC) bias voltage in order for said two ADCs to convert the analog signals of two channels to respective digital signals. Furthermore, a maximum reference voltage and a minimum reference voltage each of a predetermined level should be supplied to allow the analog signals to be converted to digital signals within scopes of maximum reference voltage and minimum reference voltage.
There is no specification on the operational characteristics relative to two ADCs disposed in the satellite DMB receivers. Typically, satellite DMB receiver manufacturers provide two DC bias voltage suppliers to generate a DC bias voltage in order to set up a DC bias voltage of a predetermined level, and supply the generated DC bias voltage to analog signals of two channels for combination thereof. The manufacturers also prepare two reference voltage generators for generating a maximum reference voltage and a minimum reference voltage, and the maximum reference voltage and the minimum reference voltage generated by said two reference voltage generators are supplied to two ADCs.
Adjustment is implemented in which levels of the DC bias voltage generated by said two bias voltage suppliers and levels of the maximum reference voltage and the minimum reference voltage generated by said two reference voltage generators are matched.
However, even if the DC bias voltage outputted by the two bias voltage suppliers and the maximum reference voltage and the minimum reference voltage outputted by the two reference voltage generators are adjusted to match each other, chances are that the DC bias voltage and the maximum and minimum reference voltages do not match as time goes by.
If the levels of the DC bias voltage and the levels of maximum and minimum reference voltages supplied to said two ADCs change and do not match therebetween, gains of said two ADCs come to differ, and difference of gains between the said two ADCs bring about differentiation of values in which analog signals of two channels each having the same level are converted to digital signals, thereby resulting in degraded picture quality.
Therefore, it is preferred that two ADCs convert two analog signals to respective digital signals with the same operational characteristics therebetween.